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2410 Instruction Manual

Digital I/O Interface

Chapter 4: Digital I/O Interface

4.1 Overview

Model 2410 has 48 general-purpose digital I/O (DIO)

channels, numbered 0 to 47.

Figure 3: DIO Block Diagram (1 of 48 channels shown)

As shown in Figure 3, the DIO output section consists of an

output register, open-collector transistor, and pullup resistor.

The transistor drives the DIO signal to GND when the output is

turned on (i.e., logic one stored in output register), and the

pullup resistor pulls the DIO signal high when the output is

turned off (logic zero stored in output register).

The input section consists of an inverting buffer and a status

LED. The logic level at the DIO connector is inverted so that

the LED will light and the channel will be sampled as a logic

one when the DIO signal is low (0V at the connector).

Conversely, 5V at the connector will turn off the LED and be

sampled as logic zero.

4.1.1 Basic Modes

Each DIO channel may be independently operated in one of

these modes:

• Output - The channel is driven by its onboard driver and

is typically connected to an external load.

• Input - The onboard driver remains in the off state so that

an external driver (open collector or open drain) can drive

the channel low. When the external driver is turned off, the

channel is pulled high by the onboard pullup resistor.

• Wired-OR - The channel is connected to an external

driver (open collector or open drain) so that it can be

driven low by either the onboard driver or the external

driver. If both drivers are turned off, the channel is pulled

high by the onboard pullup resistor.

4.1.2 PWM Output Mode

When operating as an output (or wired-OR), a DIO channel

may be configured to operate in either Standard or PWM

mode. In the Standard mode (default upon reset), a channel’s

driver is programmed to explicit, static states by the network

client. When operating in PWM mode, a channel will output a

square wave with period and duty cycle specified by the client.

4.1.3 Input Debounce and Capture

The module’s internal CPU samples each DIO channel 1000

times per second and passes the samples through a debounce

filter. A channel is regarded to be in a particular physical state

only after it has been in that state for a specific “debounce”

time interval. The debounce interval, which defaults to 10 ms

upon reset, is independently configurable for each channel.

After passing through debounce filters, the channels are

monitored for state changes. When enabled to do so, the

module will register a detected state change and optionally

send a notification message to a client. See the Model 24xx

Family API and Programming Guide for details.

Note: The module’s synchronous sampling mechanism

introduces latency between the time a physical input changes

and the moment that change will be visible to a client.

Debounced inputs are delayed by the debounce interval plus up

to one additional sample period (1 ms).

4.2 DIO Connections

All DIO channels are available through the 50-pin header

labeled DIO in Figure 2.

DIO

Internal Data Bus

Output

Connector

GND

Inv.

Buffer

LED

Pullup

+5V



0-47 - Each of these LEDs will light when the

associated DIO signal is driven low by the onboard

driver or by an external active-low driver.

Table 3: DIO Connector Pinout

Pin Signal Pin Signal

1 DIO31 26 DIO6

2 DIO30 27 DIO5

3 DIO29 28 DIO4

4 DIO28 29 DIO3

5 DIO27 30 DIO2

6 DIO26 31 DIO1

7 DIO25 32 DIO0

8 DIO24 33 DIO15

9 DIO39 34 DIO14

10 DIO38 35 DIO13

11 DIO37 36 DIO12

12 DIO36 37 DIO11

13 DIO35 38 DIO10

14 DIO34 39 DIO9

15 DIO33 40 DIO8

16 DIO32 41 DIO23

1 2 3 4 5 6 7 8 9

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